EU PVSEC Programme Online
EU PVSEC 2019, 9 - 13 September 2019, Marseille
Presentation: 2AO.6.2 Correlating Template Properties with the Quality of Epitaxially Grown Silicon Wafers
Type: Oral
Date: Monday, 9th September 2019
17:00 - 18:30
Location / Room: Marseille Chanot Convention and Exhibition Centre, Garden Level / Auditorium 4 Endoume 1+2
Author(s): M. Drießen, T. Fehrenbach, L. Kirste, C. Weiss, S. Janz
Presenter / Speaker: M. Drießen, Fraunhofer ISE, Freiburg, Germany
Event: Conference Conference
Session: 2AO.6 Thin Silicon Solar Cells
Type(s) of Access:  Conference Registration
Topic: 2. 1 Feedstock, Crystallisation, Wafering, Defect Engineering
Keywords: Epitaxy, Porous Silicon, Silicon Foil
Summary / Abstract: Epitaxially grown silicon wafers (EpiWafers) are a promising alternative to conventional wafers. High lifetimes are already reported for EpiWafers but still defects limit their quality. The properties of the reorganized porous silicon template affect the crystal defects in final EpiWafers. Therefore, the influence of reorganization temperature on template properties has been investigated. Atomic force microscopy (AFM) measurements reveal an increase of surface waviness of reorganized porous silicon layers with an increasing process temperature. A reduced distortion of the crystal lattice of the porous layers is measured for the higher temperature using high resolution X-ray diffraction (HRXRD). Though both properties have the potential for reducing the quality of subsequently grown epitaxial layers, measured defect densities and local minority charge carrier lifetimes suggest that there are other causes which are quality limiting. Thermal stress in combination with the mechanical weakness of the porous layers is identified as one decisive factor. Impurities in form of residual native oxide on pore walls are suspected to increase crystal defect formation as well.